Low power circuit for waking from a sleep mode by using a remote power-on signal

ABSTRACT

An electronic circuit which has a voltage terminal, a switch, a voltage stabilizer and a computer. In addition, an interface terminal is provided, via which the computer can exchange data via an interface. After a supply voltage is applied at the voltage terminal, the switch ( 11 ) is initially closed so that the circuit has an extremely low quiescent current. A signal at the interface terminal causes the switch to close and the voltage stabilizer and the computer are activated.

FIELD OF THE INVENTION

The present invention relates to an electronic circuit.

BACKGROUND INFORMATION

Electronic circuits having a computer with an interface for the exchangeof serial data are already known. Switches are provided via which thecomputer can be optionally connected to a voltage connection. Noprovisions are made for activating the switch by signals at theinterface terminal.

In addition, computers are known that have a serial interface and thatcan be placed into a so-called sleep mode. In sleep mode, parts of thecomputer are no longer supplied with voltage resulting in a lower powerconsumption by the computer in this operating state. The computer can beswitched from the sleep mode into an active state again by signals viathe serial interface. However, it is necessary for at least parts of thecomputer to remain activated in order to process the signals present atthe interface terminal. Such computers must therefore also be suppliedwith a non-negligible quiescent current even in sleep mode.

SUMMARY OF THE INVENTION

In contrast, the advantage of the electronic circuit according to thepresent invention is that the computer can be activated by a signal atthe interface terminal and the power consumption in the inactivatedstate is particularly low at the same time. In the inactivated state, acurrent demand of less than 300 μA can be attained in this manner.

The second switch causes the computer to be connected by a single signalat the interface terminal to the voltage connection and to remainconnected thereafter. The design of the first switch as a pnp transistormakes it possible for the switch to be used with serial data cableswhich have a high level in the sleep mode. The design of the firstswitch as an npn transistor makes it possible for the device to be usedwith serial data cables which have a LOW level in the sleep mode. Sincethe gate terminal of the second switch can be connected to groundpotential by the computer, the power supply for the computer can againbe terminated by the computer. A Zener diode can be used for decouplingthe first switch and the second switch from voltage. The gate terminalof the first switch and the interface terminal can also be separatedfrom each other by a diode, with the result that after the first switchis closed, the potentials at the interface terminal no longer have aneffect on the gate terminal of the first switch. An interface can beprovided in the computer for data interchange.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 illustrates a first embodiment of an electronic circuit accordingto the present invention.

FIG. 2 illustrates a second embodiment of an electronic circuitaccording to the present invention.

DETAILED DESCRIPTION

FIG. 1 shows an electronic circuit having a computer 1. Computer 1 isprovided with an interface 2 which is connected to an interface terminal3 via a suitable cable. Interface 2 contains the necessary hardware forcommunication via data cables. A serial data transmission cable can beconnected to interface terminal 3. Computer 1 is connected via anadditional cable to a voltage stabilizer 4, which in turn is connectedto voltage terminal 5 via a first switch 11. A supply voltage, forexample 12 volts, is applied to voltage terminal 5, the supply voltageserving to supply the entire electronic circuit with voltage. Switch 11is in this case designed as a pnp transistor, its emitter beingconnected to voltage terminal 5 and its collector to voltage stabilizer4. When switch 11 is closed, voltage stabilizer 4 is connected tovoltage terminal 5 so that computer 1 is supplied with an operatingvoltage or operating current via voltage stabilizer 4. First switch 11has a gate terminal in the form of a base. This gate terminal isconnected to voltage terminal 5 via a first resistor 13. In addition,voltage terminal 5 is connected to interface terminal 3 via a thirdresistor 15. In addition, the base of pnp transistor 11 is connected tothe anode of a diode 20. The cathode of diode 20 is connected withinterface terminal 3. In addition, a second switch 12 is provided, whichhere is designed in the form of an npn transistor. The emitter of npntransistor 12 is connected to a ground terminal. The collector of npntransistor 12 is connected to the base terminal of pnp transistor 11.The base of npn transistor 12 is connected to the anode of a Zener diode21 via a resistor 14. The cathode of Zener diode 21 is connected to thecollector of pnp transistor 11. In addition, the base of npn transistor12 is connected with an output 31 of computer 1.

In order to describe the function of the circuit of FIG. 1, it isinitially assumed that a positive operating voltage is present at thevoltage terminal and no additional voltages are applied to interfaceterminal 3. A positive voltage is then applied to the base of pnptransistor 11 via first resistor 13 so that pnp transistor 11 isblocked. Consequently, voltage stabilizer 4 is not supplied withoperating voltage so that also no operating voltage is available tocomputer 1. In this state, the power consumption of the circuit shown inFIG. 1 is particularly low, since essentially only parasitic currentscan flow. Interface terminal 3 is also kept at the positive supplyvoltage of voltage terminal 5 via resistor 15 as long as the circuit isnot connected via interface terminal 3 to other electronic circuitswhich pull interface terminal 3 to a different potential. Sinceresistors 13 and 15 have the function of keeping the base of pnptransistor 11 or interface terminal 3 at a higher potential, they are asa rule also described as pull-up resistors. The resistors are designedin such a way that a low-impedance connection to ground can pull thebase of pnp transistor 11 or interface terminal 3 to a lower potential.After an initial application of a positive supply voltage at voltageterminal 5, the circuit according to FIG. 1 is thus initially in a sleepmode in which computer 1 is not supplied with supply voltage andconsequently only low currents flow.

In order to activate computer 1, interface terminal 3 can be connectedto ground with low impedance by, for example, an additional circuitwhich is not shown here. This potential is then also applied to the baseof pnp transistor 11 via diode 20 so that this transistor changes fromthe blocked state to the conducting state. The first switch representedby pnp transistor 11 is thus changed from an open state to a closedstate so that voltage stabilizer 4 is then connected to voltage terminal5 via now closed switch 11. Voltage stabilizer 4 then makes an operatingvoltage available to computer 1 with the result that the latter isactivated. Via Zener diode 21 and second resistor 14, the positiveoperating voltage of voltage terminal 5 is of course also present at thebase of npn transistor 12 so that this transistor is also switched fromthe blocked state to the conducting state. Switch 12 formed by npntransistor 12 is thus also brought from an open state into a closedstate, whereby it connects the base of pnp transistor 11, i.e., the gateterminal of switch 11, to a ground terminal with low impedance. Secondswitch 12 thus causes a locking to take place, i.e., after switch 11 isonce closed, switch 12 ensures that this state is also maintained,irrespective of the electrical potential subsequently present atinterface terminal 3. Diode 20 ensures that any potential can be appliedto interface terminal 3 despite the low-impedance connection of the baseof pnp transistor 11 to ground. The circuit according to FIG. 1 can thusbe placed in a state of operational readiness by a one-time signal atinterface terminal 3. Through the use of a pnp transistor 11 as thefirst switch, the electronic circuit is intended for use with a serialdata bus in which the sleep state of the data transmission cable isproduced by a high potential. Information then causes the datatransmission cable to be placed bitwise into a low state. In the presentcase the low potential is, for example, produced by connection to aground terminal. Consequently, the electronic circuit thus formed isinitially in a sleep state after a power on, i.e., after the applicationof a supply voltage, the power consumption being exceptionally low,since only parasitic currents flow. A quiescent current of less than 300μA can be attained in this manner. A single signal on the serial datatransmission cable can then place the circuit in a state of operationalreadiness. It is also significant that no additional connections arerequired for activation but rather one connection can be usedsimultaneously for the serial data transmission cable and the activationsignal.

In addition, it may also be desirable to place the already activatedcircuit back in an inactive state. For this purpose, computer 1 has anoutput 31, to which ground potential from computer 1 can be applied.Since this terminal 31 is connected to the base of npn transistor 12 bya suitable cable, computer 1 can close switch 12 again. Since thelow-impedance connection to ground no longer exists then, the base ofpnp transistor 11 is again pulled to the positive supply potential atvoltage terminal 5 via pull-up resistor 13. Resistor 14 or Zener diode21 with a typical operating point of 5 volts ensures that switch 12 andswitch 11 open reliably. This is due to the fact that voltage decouplingbetween the two circuits is assured by Zener diode 21. It is thusbrought about that switch 12 is already completely open before computer1 is isolated from the supply voltage at voltage terminal 5 by switch11. Otherwise, a repeated power off and power on, i.e., an oscillationcould occur. As an alternative, it is also possible for voltagestabilizer 4 to contain storage elements, capacitors for example, whichcontinue to maintain the operational readiness of computer 1 for a brieftime after switch 11 is opened. In this case also, computer 1 could beisolated from voltage terminal 5 without Zener diode 21 being requiredfor this purpose.

FIG. 2 shows an additional embodiment which is suitable for datatransmission cables whose idle state is a low potential or groundpotential and which then transmit data by bitwise application of highvoltages. Computer 1, interface 2, interface terminal 3, voltagestabilizer 4 and voltage terminal 5 correspond to the components alreadyknown from FIG. 1. In this case, first switch 11 is designed as an npntransistor whose collector is connected to voltage terminal 5, whoseemitter is connected to voltage stabilizer 4 and whose base terminal isconnected to the cathode of a di de 20. The anode of diode 20 isconnected to interface terminal 3. Furthermore, the base of npntransistor 11 is connected to a ground terminal via a resistor 13. Annpn transistor 12 is provided as a second switch in this case, thetransistor's cathode being connected to voltage terminal 5 and itsemitter being connected to the base terminal of npn transistor 11. Thebase of npn transistor 12 is again connected to a terminal 31 ofcomputer 1. Furthermore, the base of transistor 12 is connected to theanode of Zener diode 21 via a resistor 14. The cathode of Zener diode 21is connected to the emitter of transistor 11.

As can be recognized, no pull-up resistors are provided so that after avoltage is applied to voltage terminal 5, first switch 11 initiallystays closed as long as no positive voltage is also applied to interfaceterminal 3. This corresponds to the inactive state of the circuit. If apositive potential is briefly applied to interface terminal 3, switch 11is closed and voltage stabilizer 4 is connected to voltage terminal 5.In addition, a positive voltage is also applied to the base oftransistor 12 so that switch 12 is then closed. As a result, supplyvoltage 5 is then applied at a low impedance to the base terminal ofswitch 11 so that the power on state is maintained. The computer canthen be decoupled from voltage terminal 5 again by the application ofground potential at terminal 31 of computer 1. Diodes 20 and 21 againserve the purpose of decoupling from the voltage.

What is claimed is:
 1. An electronic circuit comprising: a computer; avoltage terminal; an interface terminal, the computer configured toexchange serial data via the interface terminal; a first switch, thefirst switch being electrically coupled between the computer and thevoltage terminal, the first switch being a controllable switch, thefirst switch having a first gate terminal, the first gate terminal beingcoupled to the interface terminal, the first gate terminal beingconnectable via a first resistor to a first potential, the first switchbeing opened when the first potential is applied to the first gateterminal, the first switch being closed when a second potential isapplied to the first gate terminal; and a second switch, the secondswitch being a controllable switch having a second gate terminal, thefirst gate terminal being connectable via the second switch to thesecond potential, a third potential being connectable to the second gateterminal when the first switch is open, the second switch remaining openwhen the third potential is connected to the second gate terminal. 2.The electronic circuit according to claim 1, wherein the first gateterminal is connected to the first potential via the first resistor, andthe first gate terminal is connected to the second potential via thesecond switch.
 3. The electronic circuit according to claim 2, whereinthe first switch is a pnp transistor, and the second switch is an npntransistor, an emitter of the pnp transistor being connected to thevoltage terminal, a collector of the pnp transistor being connected to abase of the npn transistor via a second resistor, an emitter of the npntransistor being connected to a ground terminal, a collector of the npntransistor being connected to the first gate terminal.
 4. The electroniccircuit according to claim 1, wherein the first switch and the secondswitch are npn transistors, a collector of the first switch beingconnected to the voltage terminal, an emitter of the first switch beingconnected to the second gate terminal via a second resistor, a collectorof the second switch being connected to the voltage terminal, an emitterof the second switch being connected to a ground terminal via the firstresistor.
 5. An electronic circuit, comprising: a computer; a voltageterminal; an interface terminal, the computer configured to exchangeserial data via the interface terminal; a first switch electricallycoupled between the computer and the voltage terminal, the first switchbing a controllable switch, the first switch having a first gateterminal, the first gate terminal being coupled to the interfaceterminal, the first gate terminal being connectable via a first resistorto a first potential, the first switch being opened when the firstpotential is applied to the first gate terminal, the first switch beingclosed when a second potential is applied to the first gate terminal;and a second switch, the second switch being a controllable switchhaving a second gate terminal, the first gate terminal being connectablevia the second switch to the second potential when the first switch isopen, the second switch remaining open when a third potential isconnected to the second gate terminal; wherein the second gate terminalis connected to an output of the computer, the computer configured toselectively apply a ground potential to the second gate terminal via theoutput of the computer.
 6. The electronic circuit according to claim 5,further comprising a zener diode connected between the first switch anda second resistor, an anode of the zener diode being connected to thesecond resistor, a cathode of the zener diode being connected to thefirst switch.
 7. The electronic circuit according to claim 1, furthercomprising a diode connected between the first gate terminal and theinterface terminal.
 8. The electronic circuit according to claim 1,wherein the computer includes an interface, the interface beingconnected to the interface terminal.
 9. The electronic circuit accordingto claim 1, wherein the first switch is configured to selectably apply apotential at the voltage terminal the computer.
 10. An electroniccircuit comprising: a computer; a voltage terminal; an interfaceterminal, the computer being capable of exchanging serial data via theinterface terminal; a first switch, the first switch being electricallycoupled between the computer and the voltage terminal, the first switchbeing a controllable switch, the serial data influencing the state ofthe first switch, the first switch having a first gate terminal, thefirst gate terminal being coupled to the interface terminal, the firstgate terminal being connectable via a first resistor to a firstpotential, the first switch being opened when the first potential isapplied to the first gate terminal, the first switch being closed when asecond potential is applied to the first gate terminal; and a secondswitch, the second switch being a controllable switch having a secondgate terminal, the first gate terminal being connectable via the secondswitch to the second potential, a third potential being connectable tothe second gate terminal when the first switch is open, the secondswitch remaining open when the third potential is connected to thesecond gate terminal.
 11. An electronic circuit comprising: a computer;a voltage terminal; an interface terminal, the computer being capable ofexchanging serial data via the interface terminal; a first switch, thefirst switch being electrically coupled between the computer and thevoltage terminal, the first switch being a controllable switch, thefirst switch having a first gate terminal, the first gate terminal beingcoupled to the interface terminal, the first gate terminal beingconnectable via a first resistor to a first potential, the first switchbeing opened when the first potential is applied to the first gateterminal, the first potential being supplied to the computer when thefirst switch is closed, the first switch being closed when a secondpotential is applied to the first gate terminal; and a second switch,the second switch being a controllable switch having a second gateterminal, the first gate terminal being connectable via the secondswitch to the second potential, a third potential being connectable tothe second gate terminal when the first switch is open, the secondswitch remaining open when the third potential is connected to thesecond gate terminal.
 12. An electronic circuit comprising: a computer;voltage terminal; an interface terminal, the computer being capable ofexchanging serial data via the interface terminal; a first switch, thefirst switch being electrically coupled between the computer and thevoltage terminal, the first switch being a controllable switch, thefirst switch having a first gate terminal, the first gate terminal beingcoupled to the interface terminal, the first gate terminal beingconnected via a first resistor to a first potential, the first switchbeing opened when the first potential is applied to the first gateterminal, the first switch being closed when a second potential isapplied to the first gate terminal, the first potential being suppliedto the computer when the first switch is closed, the first potential notbeing supplied to the computer when the first switch is open; and asecond switch, the second switch being a controllable switch having asecond gate terminal, the first gate terminal being connected via thesecond switch to the second potential, the second gate terminal beingconnected to an output of the computer, a computer supplied thirdpotential being connectable to the output of the computer when the firstswitch is open, the second switch remaining open when the thirdpotential is connected to the output of the computer.